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기록

METHOD FOR MANUFACTURING SPLIT-GATE POWER DEVICE DEFINING TRENCHES IN ACTIVE REGION

발명심사 중
1조회수
10청구항 · 1 독립항
§ Ⅰ

개요

IPC 분류

H10D 30/1H10D 30/66H10D 64/H10D 64/1

CPC 분류

H10D30/297H10D30/668H10D64/1H10D64/117

A method for manufacturing a split-gate power device includes preparing at least one epitaxial layer and a silicon oxide film on a silicon substrate, etching upper portions of trenches on the at least one epitaxial layer according to a gate trench pattern and a source trench pattern; depositing silicon nitride protective films on the trenches, and etching lower portions of the trenches downward to form source trenches; forming voltage-resistant oxide layers on the source trenches by an oxidation process, and preparing shield gate polysilicon in the source trenches; removing the silicon nitride protective films to form gate trenches, forming gate oxide layers respectively on the gate trenches, simultaneously forming polysilicon interlayer oxide layers on the shield gate polysilicon; forming gate polysilicon in the gate trenches; forming body regions and source regions through ion implantation; preparing contact holes and tungsten plugs; and forming a circuit and a passivation layer.

원문 (중국어)

A method for manufacturing a split-gate power device includes preparing at least one epitaxial layer and a silicon oxide film on a silicon substrate, etching upper portions of trenches on the at least one epitaxial layer according to a gate trench pattern and a source trench pattern; depositing silicon nitride protective films on the trenches, and etching lower portions of the trenches downward to form source trenches; forming voltage-resistant oxide layers on the source trenches by an oxidation process, and preparing shield gate polysilicon in the source trenches; removing the silicon nitride protective films to form gate trenches, forming gate oxide layers respectively on the gate trenches, simultaneously forming polysilicon interlayer oxide layers on the shield gate polysilicon; forming gate polysilicon in the gate trenches; forming body regions and source regions through ion implantation; preparing contact holes and tungsten plugs; and forming a circuit and a passivation layer.