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기록

SEMICONDUCTOR DEVICE STRUCTURE AND METHODS OF FORMING THE SAME

발명심사 중
20청구항 · 3 독립항
§ Ⅰ

개요

발명자

I-Hsiang MA; Li-Wei YIN; Kai-Min CHIEN; Min-Chia LEE; Kuo-Chin LIU; Yih-Ann LIN; Ryan Chia-Jen CHEN

IPC 분류

H1L 29/423H1L 29/6H1L 29/8H1L 29/66H1L 29/775H1L 29/786

CPC 분류

H10D30/6735H10D30/14H10D30/43H10D30/6757H10D62/121H10D62/151H10D64/17

Embodiments of the present disclosure provide a semiconductor device structure and methods of forming the same. The structure includes a first semiconductor layer disposed over a substrate, a source/drain region disposed adjacent the first semiconductor layer, a gate spacer disposed over the first semiconductor layer, a native oxide layer disposed between the gate spacer and the source/drain region and between the gate spacer and the first semiconductor layer, a gate dielectric layer disposed between the native oxide layer and the first semiconductor layer, and a gate electrode layer disposed on the gate dielectric layer. The gate electrode layer includes a first portion having a first width and a second portion having a second width greater than the first width.

원문 (중국어)

Embodiments of the present disclosure provide a semiconductor device structure and methods of forming the same. The structure includes a first semiconductor layer disposed over a substrate, a source/drain region disposed adjacent the first semiconductor layer, a gate spacer disposed over the first semiconductor layer, a native oxide layer disposed between the gate spacer and the source/drain region and between the gate spacer and the first semiconductor layer, a gate dielectric layer disposed between the native oxide layer and the first semiconductor layer, and a gate electrode layer disposed on the gate dielectric layer. The gate electrode layer includes a first portion having a first width and a second portion having a second width greater than the first width.