BACKSIDE SUBSTRATE DIELECTRIC BREAK
개요
출원인
INTERNATIONAL BUSINESS MACHINES CORPORATION
발명자
Masoud Zabihi; Ruilong Xie; Robert Gauthier; Anindya Nath; Anthony I-Chih Chou
IPC 분류
CPC 분류
A semiconductor device includes a passive device including a set of P-type doped regions, a set of N-type doped regions, a first N-well region and a second N-well region below the set of P-type doped regions and the set of N-type doped region, respectively, a first shallow trench isolation (STI) between the first N-well region and the second N-well region, a substrate below the first STI; and a dielectric break within the substrate. The dielectric break is vertically extended from the first STI to a bottom interlayer dielectric (BILD) below the substrate.
원문 (중국어)
A semiconductor device includes a passive device including a set of P-type doped regions, a set of N-type doped regions, a first N-well region and a second N-well region below the set of P-type doped regions and the set of N-type doped region, respectively, a first shallow trench isolation (STI) between the first N-well region and the second N-well region, a substrate below the first STI; and a dielectric break within the substrate. The dielectric break is vertically extended from the first STI to a bottom interlayer dielectric (BILD) below the substrate.