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기록

SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SAME

발명심사 중
21청구항 · 4 독립항
§ Ⅰ

개요

발명자

Junsu Kong; Woncheol Jeong; Kyungho Kim; Wangseop Lim; Youngchai Jung; Juseob Jeong; Kyubong Choi; Seojung Kim; Taehyun Ryu; Yeonho Park; Jinseok Lee

IPC 분류

H10D 84/1H10D 30/H10D 30/1H10D 62/10H10D 64/1H10D 64/68H10D 84/85

CPC 분류

H10D84/181H10D30/191H10D62/102H10D64/17H10D64/691H10D30/502H10D84/851H10D84/856

A method of manufacturing a semiconductor device comprising: forming active structures; forming preliminary gate dielectric layers on the active structures; forming a first dipole layer including a first dipole material and a second dipole layer including a second dipole material on the preliminary gate dielectric layers; removing the first and second dipole layers in regions other than a first region of the active structures; removing a portion of the second dipole layer in regions other than a second region of the active structures, wherein each of the first and second regions includes at least two active structures, and the first region and the second region overlap to form an overlapping region; and performing a heat treatment process of diffusing the first and second dipole materials into the preliminary gate dielectric layers, wherein the overlapping region includes at least one of the active structures.

원문 (중국어)

A method of manufacturing a semiconductor device comprising: forming active structures; forming preliminary gate dielectric layers on the active structures; forming a first dipole layer including a first dipole material and a second dipole layer including a second dipole material on the preliminary gate dielectric layers; removing the first and second dipole layers in regions other than a first region of the active structures; removing a portion of the second dipole layer in regions other than a second region of the active structures, wherein each of the first and second regions includes at least two active structures, and the first region and the second region overlap to form an overlapping region; and performing a heat treatment process of diffusing the first and second dipole materials into the preliminary gate dielectric layers, wherein the overlapping region includes at least one of the active structures.