Driving control circuit, gate driving circuit and display panel
데이터 출처: EPO OPS
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개요
출원 번호
CN20228005046
발명자
ZHANG TIAOMEI; CHEN WENBO; WANG MENGQI; WU JIANPENG; YU ZIYANG; YAN TIANYI; JIANG ZHILIANG; HU MING
출원일
Dec 13, 2022
공개일
Aug 13, 2024
특허 패밀리 ID
91484136
IPC 분류
CPC 분류
A drive control circuit includes an input circuit (10), a first output circuit (11), and a first output control circuit (12). The input circuit (10) is configured to control the potentials of the first node (N1) and the second node (N2) under the control of a signal input end (INPUT) and a clock signal end. The first output circuit (11) is configured to provide a first power supply signal to the third node (N3) under the control of the first node (N1), or to provide a second power supply signal to the first output (OUT1) under the control of the second node (N2). The first output control circuit (12) is configured to connect or disconnect the third node (N3) and the first output end (OUT1) under the control of the first control end (CL1).
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