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기록

Display module and display device

기타 / 미제공알 수 없음

데이터 출처: EPO OPS

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91715955패밀리
§ Ⅰ

개요

출원인

BOE TECHNOLOGY GROUP CO LTD; ORDOS YUANSHENG OPTOELECTRONICS CO LTD

출원 번호

CN20228005263

발명자

LIU BIN; FENG YU; WU XINGUO; TIAN LIANG; WANG HAIDONG; YANG YUE; MA BO; GUO CHUNSHENG; LYU WENQIANG; YAN JING

출원일

Dec 26, 2022

공개일

Aug 27, 2024

특허 패밀리 ID

91715955

IPC 분류

G02F1/1335G02F1/1345G09G3/00

CPC 분류

G02F1/1335G02F1/1345G09G3/00

A display module (20) comprises a display panel (210), a driving chip (220), an electrostatic conduction pattern (250) and a conductive part (240). The display panel (210) includes a ground pattern (219) located in a non-display area (SA) and a plurality of data lines (212) located in a display area (AA). The driving chip (220) is disposed on the display panel (210), is located in the non-display area (SA), and is coupled to the plurality of data lines (212). The driving chip (220) is provided with a first end (221) and a second end (222) which are distributed along a first direction, and the first direction is the length direction of the driving chip (220). The static electricity conduction pattern (250) and the conductive part (240) are both arranged on the display panel (210) and located in the non-display area (SA) and located on the side, away from the second end (222) of the driving chip (220), of the reference line (LL). The reference line (LL) is a straight line overdriving the first end (221) of the chip (220) and extending along a second direction, and the second direction is perpendicular to the first direction. In the first direction, there is a first distance (D1) between the electrostatic conductive pattern (250) and the reference line (LL), and there is a second distance (D2) between the conductive portion (240) and the reference line (LL). The conductive portion (240) is in contact with both the static conductive pattern (250) and the ground pattern (219).

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