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기록

Gate drive circuit and display device

기타 / 미제공알 수 없음

데이터 출처: EPO OPS

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91534562패밀리
§ Ⅰ

개요

출원인

HEFEI XINSHENG OPTOELECTRONIC TECHNOLOGY CO LTD; BOE TECHNOLOGY GROUP CO LTD

출원 번호

CN202322614189U

발명자

DU HUAKUN; CHEN PENG; LYU FENGZHEN; ZHANG DONGDONG; LI LONG; MA LI; LI TAO; FANG YUNHUA; SONG XUEYAN

출원일

Sep 25, 2023

공개일

Jun 18, 2024

특허 패밀리 ID

91534562

IPC 분류

G09G3/20

The utility model provides a gate drive circuit and a display device, and belongs to the technical field of display. The gate drive circuit comprises a plurality of cascaded shift registers and two groups of clock signal lines, and each group of clock signal lines comprises 2N clock signal lines; the plurality of cascaded shift registers are divided into a plurality of groups of shift registers, and each group of shift registers comprises 2N shift registers; the shift registers in the odd-numbered groups are connected with the same group of clock signal lines, the shift registers in the even-numbered groups are connected with the same group of clock signal lines, and the shift registers in the odd-numbered groups and the even-numbered groups are connected with different groups of clock signal lines; n is an integer greater than or equal to 1; the shift register at least comprises an input sub-circuit, an output sub-circuit, at least one pull-down control sub-circuit and at least one pull-down sub-circuit, the pull-down control sub-circuits in each group of shifting registers are shared, and the pull-down sub-circuits in each group of shifting registers are shared.

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