Clock control circuit and clock management system

The utility model discloses a clock control circuit and a clock management system, the clock control circuit comprises a reset circuit and a clock circuit, the reset circuit comprises a first switch tube, the power supply end of the clock circuit is connected with a first power supply through the first switch tube, the control end of the first switch tube is used for receiving an enable signal, and the control end of the first switch tube is connected with a second power supply. And controlling the working state of the first switch tube according to the enable signal to realize the reset function of the clock circuit. Therefore, the reset circuit is added to the power port of the clock circuit, so that the reset function of the clock circuit can be realized, the potential risk caused when the clock circuit is abnormal is solved, and the reliability of the circuit is improved.