Processor Employing Instruction That Performs A Sum Of Two Closest Operation

原文（中国語）

A system includes a control loop signal path. The signal path includes three processors. Each processor (“slice”) includes an ADC, a digital signal processor (DSP), and a DAC. The DSPs execute identical programs of instructions, so that at any given time they are executing the same instruction. The DSP of the slice executes an instruction that performs a “register sum of two closest” (RSOC) operation. The instruction identifies a register of the slice, and the data content of this register is output to the other slices. The DSP performs a “sum of two closest” operation on: 1) the data content of the register, 2) the data content to the corresponding registers in the other slices. The DSP determines which two of these values are numerically the closest, generates a result value that is a function of these two values (for example, the sum), and writes the result into the register.