REGISTER FILE PACKING
개요
발명자
Steven Gregory Flolid; John Kalamatianos
IPC 분류
CPC 분류
A central processing unit (CPU) is disclosed. The CPU includes: a physical register file (PRF) including a plurality of physical registers; an instruction queue configured to store an instruction identifying an opcode, a source operand register, and a destination operand register; and an allocator, configured to allocate a first physical register to the destination operand register, where the first physical register has a first changeable bit size corresponding with a result bit size of the destination operand register.
원문 (중국어)
A central processing unit (CPU) is disclosed. The CPU includes: a physical register file (PRF) including a plurality of physical registers; an instruction queue configured to store an instruction identifying an opcode, a source operand register, and a destination operand register; and an allocator, configured to allocate a first physical register to the destination operand register, where the first physical register has a first changeable bit size corresponding with a result bit size of the destination operand register.