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INTERRUPT INTEGRITY CHECK

发明专利审中
20权利要求 · 3 独立
§ Ⅰ

卷宗概要

申请人

STMicroelectronics International N.V.

发明人

Roberto Colombo; Vivek Mohan Sharma

IPC 分类

G6F 11/7

CPC 分类

G6F11/772G6F11/757G6F11/76

According to an embodiment, an interrupt checker circuit includes a timestamp checker circuit having a first input terminal coupled to an interrupt signal. A second input terminal of the timestamp checker circuit is configured to receive a global time reference. The timestamp checker circuit is configured to record a first timestamp corresponding to a first interrupt event at the first input terminal of the timestamp checker circuit based on the global time reference, record a second timestamp corresponding to a second interrupt event at the first input terminal of the timestamp checker circuit based on the global time reference, and compare a time difference between the second timestamp and the first timestamp to an expected duration and, based thereon, generate an error signal in response to the time difference being outside the expected duration.

原文(中文)

According to an embodiment, an interrupt checker circuit includes a timestamp checker circuit having a first input terminal coupled to an interrupt signal. A second input terminal of the timestamp checker circuit is configured to receive a global time reference. The timestamp checker circuit is configured to record a first timestamp corresponding to a first interrupt event at the first input terminal of the timestamp checker circuit based on the global time reference, record a second timestamp corresponding to a second interrupt event at the first input terminal of the timestamp checker circuit based on the global time reference, and compare a time difference between the second timestamp and the first timestamp to an expected duration and, based thereon, generate an error signal in response to the time difference being outside the expected duration.