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案件記録

ERROR HANDLING MANAGEMENT CORE

発明審査中
1閲覧数
20請求項 · 3 独立
§ Ⅰ

案件概要

発明者

Carlos Vallin; Vilas Sridharan; Magiting Talisayon; Kasir Asad Watkins

IPC分類

G6F 11/7

CPC分類

G6F11/787G6F11/721

The disclosed device includes a processor core and a management core. The management core can intercept error interrupts indicating errors for the processor core. The management core can process the error while the processor core continues operations, and can also cloak the error from an operating system. The management core can also provide the errors to a baseboard controller for storing in a non-volatile memory. Various other methods, systems, and computer-readable media are also disclosed.

原文(中国語)

The disclosed device includes a processor core and a management core. The management core can intercept error interrupts indicating errors for the processor core. The management core can process the error while the processor core continues operations, and can also cloak the error from an operating system. The management core can also provide the errors to a baseboard controller for storing in a non-volatile memory. Various other methods, systems, and computer-readable media are also disclosed.

外部リソース