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기록

Software-Guided Prefetch Throttling based on Memory Region Boundaries

발명심사 중
20청구항 · 3 독립항
§ Ⅰ

개요

발명자

Mark Evan Wilkening; John Kalamatianos

IPC 분류

G6F 12/862

CPC 분류

G6F12/862

Systems and techniques for software-guided prefetch throttling based on memory region boundaries are described. In one example, a processor includes a cache system having a cache system and a hardware prefetcher associated with a cache level of the cache system. The hardware prefetcher receives a boundary hint from a workload of an execution unit that accesses the cache level. The hardware prefetcher throttles prefetch requests based on the memory hint being satisfied. The described techniques overcome cache pollution from conventional prefetchers without limiting a prefetcher's ability to identify and respond to stride access patterns.

원문 (중국어)

Systems and techniques for software-guided prefetch throttling based on memory region boundaries are described. In one example, a processor includes a cache system having a cache system and a hardware prefetcher associated with a cache level of the cache system. The hardware prefetcher receives a boundary hint from a workload of an execution unit that accesses the cache level. The hardware prefetcher throttles prefetch requests based on the memory hint being satisfied. The described techniques overcome cache pollution from conventional prefetchers without limiting a prefetcher's ability to identify and respond to stride access patterns.