INTEGRATED CIRCUIT FLOORPLAN GENERATION USING GENERATIVE ARTIFICIAL INTELLIGENCE MODELS

원문 (중국어)

Certain aspects of the present disclosure provide techniques and apparatus for generating a layout of an integrated circuit using machine learning techniques. An example method generally includes generating a random floorplan including a random arrangement of a plurality of circuit blocks representing components of the integrated circuit. A floorplan representing a candidate layout for the integrated circuit is generated using a generative artificial intelligence model and the random floorplan. Generally, the generative artificial intelligence model may be trained to generate the floorplan based on features associated with the plurality of circuit blocks including one or more geometric conditioning features. The generated floorplan is output for fabricating one or more samples of the integrated circuit.