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기록

METHODS FOR CONTROLLING FLATNESS OF HANDLE STRUCTURES FOR USE IN SEMICONDUCTOR-ON-INSULATOR STRUCTURES

발명심사 중
49청구항 · 3 독립항
§ Ⅰ

개요

발명자

Qingmin Liu; Jeffrey L. Libbert; Guoqiang David Zhang; Charles R. Lottes; Xiaofei Lu; TaeHyeong Kim; Boram Bae; WonYong Park

IPC 분류

H1L 21/762C23C 16/40

CPC 분류

H1L21/76254C23C16/401

Methods of preparing handle structures for use in semiconductor-on-insulator structures, and methods of preparing semiconductor-on-insulator structures, include forming a charge trapping layer on a front surface of a single crystal semiconductor handle substrate by depositing a semiconductor material on the front surface, where a semiconductor oxide layer is formed on the back surface and where, during deposition of the semiconductor material on the front surface, the semiconductor oxide layer limits deposition of the semiconductor material on the back surface. The semiconductor oxide layer has a sufficient thickness to withstand the deposition of the semiconductor material without exposing the back surface.

원문 (중국어)

Methods of preparing handle structures for use in semiconductor-on-insulator structures, and methods of preparing semiconductor-on-insulator structures, include forming a charge trapping layer on a front surface of a single crystal semiconductor handle substrate by depositing a semiconductor material on the front surface, where a semiconductor oxide layer is formed on the back surface and where, during deposition of the semiconductor material on the front surface, the semiconductor oxide layer limits deposition of the semiconductor material on the back surface. The semiconductor oxide layer has a sufficient thickness to withstand the deposition of the semiconductor material without exposing the back surface.