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案件記録

SEMICONDUCTOR MANUFACTURING METHOD USING WARPAGE DEFORMATION

発明審査中
20請求項 · 3 独立
§ Ⅰ

案件概要

発明者

Jinyoung LEE; Sunghyup KIM

IPC分類

H1L 21/66H1L 21/683

CPC分類

H1L22/12H1L21/6831

A semiconductor manufacturing method using warpage deformation includes thermally deforming a three-dimensional warpage of a wafer into a two-dimensional warpage of the wafer by adjusting a temperature of each area of a plurality of areas of a stage where the wafer is mounted, chucking the wafer when the three-dimensional warpage of the wafer has been deformed into the two-dimensional warpage of the wafer, and performing a semiconductor process while the wafer is chucked.

原文(中国語)

A semiconductor manufacturing method using warpage deformation includes thermally deforming a three-dimensional warpage of a wafer into a two-dimensional warpage of the wafer by adjusting a temperature of each area of a plurality of areas of a stage where the wafer is mounted, chucking the wafer when the three-dimensional warpage of the wafer has been deformed into the two-dimensional warpage of the wafer, and performing a semiconductor process while the wafer is chucked.

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