SEMICONDUCTOR PACKAGE
案件概要
発明者
DAAE KO
IPC分類
CPC分類
A semiconductor device includes a substrate that includes an upper protection layer and a plurality of upper bonding pads, a semiconductor chip on the substrate, and a plurality of bonding wires connected to the semiconductor chip and the upper bonding pads. Each of the upper bonding pads includes a first conductive pattern, a second conductive pattern that covers a top surface and a sidewall of the first conductive pattern and includes a metal element the same as a metal element of the first conductive pattern, and a bonding layer on the second conductive pattern. A width at the top surface of the first conductive pattern is less than a width at a bottom surface of the first conductive pattern. The upper protection layer covers sidewalls of the second conductive pattern.
原文(中国語)
A semiconductor device includes a substrate that includes an upper protection layer and a plurality of upper bonding pads, a semiconductor chip on the substrate, and a plurality of bonding wires connected to the semiconductor chip and the upper bonding pads. Each of the upper bonding pads includes a first conductive pattern, a second conductive pattern that covers a top surface and a sidewall of the first conductive pattern and includes a metal element the same as a metal element of the first conductive pattern, and a bonding layer on the second conductive pattern. A width at the top surface of the first conductive pattern is less than a width at a bottom surface of the first conductive pattern. The upper protection layer covers sidewalls of the second conductive pattern.
外部リソース