DOUBLE-SIDED MULTICHIP PACKAGES WITH DIRECT DIE-TO-DIE COUPLING
개요
발명자
Michael B. Vincent; Scott M. Hayes; Zhiwei Gong
IPC 분류
CPC 분류
A multi-chip package includes two electronic components bonded to each other via features on corresponding faces of the components that are directly opposite each other. The components are encapsulated in a volume of molding material that can include upper and lower sets of redistribution layers disposed on upper and lower surfaces of the volume of molding material that include electrical interconnects. The package includes one or more internal interconnects that pass through an aperture in the first electronic component to electrically couple an electrical contact on a surface of the package to the second electronic component.
원문 (중국어)
A multi-chip package includes two electronic components bonded to each other via features on corresponding faces of the components that are directly opposite each other. The components are encapsulated in a volume of molding material that can include upper and lower sets of redistribution layers disposed on upper and lower surfaces of the volume of molding material that include electrical interconnects. The package includes one or more internal interconnects that pass through an aperture in the first electronic component to electrically couple an electrical contact on a surface of the package to the second electronic component.