SEMICONDUCTOR DEVICE INCLUDING PAIRED MEMORY DEVICES
案件概要
発明者
Nagesh Vodrahalli
IPC分類
CPC分類
A semiconductor device includes one or more paired CMOS bonded array (CBA) dies. Each paired CBA memory die includes first and second CBA memory dies. Each CBA memory die includes a first semiconductor die having a memory array formed in a silicon substrate and a second semiconductor die having CMOS logic circuits formed in a silicon substrate. The paired CBA memory dies may be affixed to each other face-to-face; that is, with their active surfaces facing each other. In such a configuration, the disparate coefficients of thermal expansion of the device layers and silicon substrate balance each other to prevent warping of the paired CBA memory die.
原文(中国語)
A semiconductor device includes one or more paired CMOS bonded array (CBA) dies. Each paired CBA memory die includes first and second CBA memory dies. Each CBA memory die includes a first semiconductor die having a memory array formed in a silicon substrate and a second semiconductor die having CMOS logic circuits formed in a silicon substrate. The paired CBA memory dies may be affixed to each other face-to-face; that is, with their active surfaces facing each other. In such a configuration, the disparate coefficients of thermal expansion of the device layers and silicon substrate balance each other to prevent warping of the paired CBA memory die.
外部リソース