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案件記録

SEMICONDUCTOR DEVICE INCLUDING PAIRED MEMORY DEVICES

発明審査中
20請求項 · 3 独立
§ Ⅰ

案件概要

IPC分類

H1L 25/65H10B 80/

CPC分類

H1L25/657H10B80/H1L2225/6513

A semiconductor device includes one or more paired CMOS bonded array (CBA) dies. Each paired CBA memory die includes first and second CBA memory dies. Each CBA memory die includes a first semiconductor die having a memory array formed in a silicon substrate and a second semiconductor die having CMOS logic circuits formed in a silicon substrate. The paired CBA memory dies may be affixed to each other face-to-face; that is, with their active surfaces facing each other. In such a configuration, the disparate coefficients of thermal expansion of the device layers and silicon substrate balance each other to prevent warping of the paired CBA memory die.

原文(中国語)

A semiconductor device includes one or more paired CMOS bonded array (CBA) dies. Each paired CBA memory die includes first and second CBA memory dies. Each CBA memory die includes a first semiconductor die having a memory array formed in a silicon substrate and a second semiconductor die having CMOS logic circuits formed in a silicon substrate. The paired CBA memory dies may be affixed to each other face-to-face; that is, with their active surfaces facing each other. In such a configuration, the disparate coefficients of thermal expansion of the device layers and silicon substrate balance each other to prevent warping of the paired CBA memory die.

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