PERFORMANCE TRANSCEIVER
개요
발명자
Seng Siong Lee; Huey Koon Tee; Zechariah Balan; Pravinah Nair Shasidharan
IPC 분류
CPC 분류
A receiver circuit is coupled to the transmitter circuit via one or more communication channels. The receiver circuit includes a first receive (Rx) driver circuit to generate a first received signal based on a first output signal. The receiver circuit includes a first calibration circuit to generate a first calibration signal based on an amplitude of the first output signal, and a second calibration circuit to generate a second calibration signal based on duty cycle distortion (DCD) associated with the first received signal. A multiplexer circuit coupled to the first calibration circuit and the second calibration circuit generates receiver calibration signals based on the first and second calibration signals. A finite state machine (FSM) circuit generates one or more activation signals based on the receiver calibration signals to configure the first Rx driver circuit.
원문 (중국어)
A receiver circuit is coupled to the transmitter circuit via one or more communication channels. The receiver circuit includes a first receive (Rx) driver circuit to generate a first received signal based on a first output signal. The receiver circuit includes a first calibration circuit to generate a first calibration signal based on an amplitude of the first output signal, and a second calibration circuit to generate a second calibration signal based on duty cycle distortion (DCD) associated with the first received signal. A multiplexer circuit coupled to the first calibration circuit and the second calibration circuit generates receiver calibration signals based on the first and second calibration signals. A finite state machine (FSM) circuit generates one or more activation signals based on the receiver calibration signals to configure the first Rx driver circuit.