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기록

PIXEL ARCHITECTURE WITH REDUCED DARK CURRENT

발명심사 중
1조회수
20청구항 · 3 독립항
§ Ⅰ

개요

발명자

Hung T. Do; Stephen W. Mims; Khai Nguyen; Paul G. Lim

IPC 분류

H4N 25/77H4N 25/709H4N 25/78

CPC 분류

H4N25/77H4N25/709H4N25/78

A given pixel of a pixel array is controlled to switch between operation modes to reduce dark current during charge transfer. The charge may be transferred from a sensing node at a gate terminal of a source follower. In an example, a mode select block is used to change the power voltage level applied to a terminal of the source follower prior to or during the charge transfer process. The mode select block includes a switch coupled between a power supply terminal and the source follower transistor and a reference transistor coupled between the power supply terminal and the source follower transistor. By activating the switch in the mode select block, the power delivered to the source follower can be reduced prior to or during the charge transfer process, which can pull down the voltage at the sensing node and reduce the dark current in the pixel.

원문 (중국어)

A given pixel of a pixel array is controlled to switch between operation modes to reduce dark current during charge transfer. The charge may be transferred from a sensing node at a gate terminal of a source follower. In an example, a mode select block is used to change the power voltage level applied to a terminal of the source follower prior to or during the charge transfer process. The mode select block includes a switch coupled between a power supply terminal and the source follower transistor and a reference transistor coupled between the power supply terminal and the source follower transistor. By activating the switch in the mode select block, the power delivered to the source follower can be reduced prior to or during the charge transfer process, which can pull down the voltage at the sensing node and reduce the dark current in the pixel.