THIN FILM TRANSISTORS WITH ADDITIVE PILLAR CAPACITORS
개요
발명자
Moshe DOLEJSI; Anbusathaiah VARATHARAJAN; Abhishek Anil SHARMA; Travis W. LAJOIE; Abhishek KOTHARI; Shardul WADEKAR; Yu-Wen HUANG; Mengcheng LU
IPC 분류
CPC 분류
Thin film transistors are described. An integrated circuit structure includes a thin film transistor having a planar or non-planar channel material layer. A conductive via or line is coupled to the thin film transistor. A capacitor structure is coupled to the conductive via or line. The capacitor structure includes a first electrode layer along sidewalls and a bottom of a dielectric pillar, a capacitor dielectric layer along side portions of the first electrode layer and on a top of the dielectric pillar, and a second electrode layer along side portions and over a top portion of the capacitor dielectric layer.
원문 (중국어)
Thin film transistors are described. An integrated circuit structure includes a thin film transistor having a planar or non-planar channel material layer. A conductive via or line is coupled to the thin film transistor. A capacitor structure is coupled to the conductive via or line. The capacitor structure includes a first electrode layer along sidewalls and a bottom of a dielectric pillar, a capacitor dielectric layer along side portions of the first electrode layer and on a top of the dielectric pillar, and a second electrode layer along side portions and over a top portion of the capacitor dielectric layer.