SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD
案件概要
発明者
Gianpaolo ROMANO; Giovanni ALFIERI; Andrei MIHAILA; Yulieth Cristina ARANGO
IPC分類
CPC分類
In one embodiment, the semiconductor device () comprises a semiconductor body (), a gate electrode () and a first electrode (), wherein—the semiconductor body () comprises a first region () which is a source region or an emitter region, and comprises a well region () located next to the first region (), the first region () is of a first conductivity type and the well region () is of a second conductivity type, —the well region () is separated from the gate electrode () by a gate insulator layer (), —the first region () is electrically contacted by means of the first electrode (), —in the first region () there is at least one current limiting region (), and—the at least one current limiting region () is a sub-region of the first region () with a decreased electrical conductivity.
原文(中国語)
In one embodiment, the semiconductor device () comprises a semiconductor body (), a gate electrode () and a first electrode (), wherein—the semiconductor body () comprises a first region () which is a source region or an emitter region, and comprises a well region () located next to the first region (), the first region () is of a first conductivity type and the well region () is of a second conductivity type, —the well region () is separated from the gate electrode () by a gate insulator layer (), —the first region () is electrically contacted by means of the first electrode (), —in the first region () there is at least one current limiting region (), and—the at least one current limiting region () is a sub-region of the first region () with a decreased electrical conductivity.
外部リソース