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Electronic device, manufacturing method thereof and electronic equipment

기타 / 미제공알 수 없음

데이터 출처: EPO OPS

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92721587패밀리
§ Ⅰ

개요

출원인

HUAWEI TECH CO LTD

출원 번호

CN202310286204

발명자

ZHAO YANCHONG; BAI XIAOYANG; DONG JINWEN; ZHU JIFENG

출원일

Mar 14, 2023

공개일

Sep 20, 2024

특허 패밀리 ID

92721587

IPC 분류

B82Y10/00B82Y40/00H01L21/60H01L21/77H01L27/12H05K1/18

The invention provides an electronic device, a manufacturing method thereof and electronic equipment, relates to the technical field of semiconductors, and can utilize a bonding mode to link a two-dimensional material and a semiconductor process. The electronic device comprises a first structure and a second structure; a bonding interface is arranged between the first structure and the second structure, and a plurality of transistors are formed on the bonding interface of the first structure and the second structure. The first structure comprises a substrate and channel layers of a plurality of transistors; the channel layer is located on the surface of the side, facing the second structure, of the substrate, and the channel layer comprises a two-dimensional material. The second structure comprises source metal electrodes, drain metal electrodes and grid electrodes of the plurality of transistors, and the source metal electrodes and the drain metal electrodes are in contact with the channel layer at a bonding interface. By bonding the first structure and the second structure, connection between the two-dimensional material and a semiconductor process is achieved, and the large-scale application requirement of the two-dimensional material is met.

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