SEMICONDUCTOR DEVICE STRUCTURE AND METHODS OF FORMING THE SAME
案件概要
出願人
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
発明者
I-Hsiang MA; Li-Wei YIN; Kai-Min CHIEN; Min-Chia LEE; Kuo-Chin LIU; Yih-Ann LIN; Ryan Chia-Jen CHEN
IPC分類
CPC分類
Embodiments of the present disclosure provide a semiconductor device structure and methods of forming the same. The structure includes a first semiconductor layer disposed over a substrate, a source/drain region disposed adjacent the first semiconductor layer, a gate spacer disposed over the first semiconductor layer, a native oxide layer disposed between the gate spacer and the source/drain region and between the gate spacer and the first semiconductor layer, a gate dielectric layer disposed between the native oxide layer and the first semiconductor layer, and a gate electrode layer disposed on the gate dielectric layer. The gate electrode layer includes a first portion having a first width and a second portion having a second width greater than the first width.
原文(中国語)
Embodiments of the present disclosure provide a semiconductor device structure and methods of forming the same. The structure includes a first semiconductor layer disposed over a substrate, a source/drain region disposed adjacent the first semiconductor layer, a gate spacer disposed over the first semiconductor layer, a native oxide layer disposed between the gate spacer and the source/drain region and between the gate spacer and the first semiconductor layer, a gate dielectric layer disposed between the native oxide layer and the first semiconductor layer, and a gate electrode layer disposed on the gate dielectric layer. The gate electrode layer includes a first portion having a first width and a second portion having a second width greater than the first width.
外部リソース