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기록

PIXEL WITH VERTICAL TRANSFER GATE

발명심사 중
20청구항 · 2 독립항
§ Ⅰ

개요

발명자

Satoshi NAKAYAMA; Nagataka TANAKA

IPC 분류

H10F 39/

CPC 분류

H10F39/80373H10F39/807H10F39/809

The image sensor comprises a semiconductor layer and a vertical gate structure. The semiconductor layer has a first side and a second side opposite to the first side. The semiconductor layer includes a first photodiode and a second photodiode adjacent to the first photodiode. The vertical gate structure is disposed between the first photodiode and the second photodiode. The vertical gate structure includes a planar portion and a vertical gate portion. The planar portion is disposed proximate to the first side. The vertical gate portion is extended from the planar portion a depth into the semiconductor layer.

원문 (중국어)

The image sensor comprises a semiconductor layer and a vertical gate structure. The semiconductor layer has a first side and a second side opposite to the first side. The semiconductor layer includes a first photodiode and a second photodiode adjacent to the first photodiode. The vertical gate structure is disposed between the first photodiode and the second photodiode. The vertical gate structure includes a planar portion and a vertical gate portion. The planar portion is disposed proximate to the first side. The vertical gate portion is extended from the planar portion a depth into the semiconductor layer.