Design Method for Fixed-Point and Floating-Point Adder
卷宗概要
申请人
Jiangsu Huachuang Microsystem Company Limited
发明人
Xin YUE; Kai CHEN; Ziheng TENG; Shiping LI; Guoqiang HE
IPC 分类
CPC 分类
A design method for a fixed-point and floating-point adder includes: Sperforming fixed-point and floating-point identification by a shared mantissa addition module; Sfor fixed-point numbers, performing low-bit calculation in the shared mantissa addition module; configuring a fixed-point number processing module, saving a carry of a highest bit in low-bit calculation results, and transmitting the saved carry to the fixed-point number processing module to obtain a fixed-point number addition result; Sfor floating-point numbers, performing calculation, in the shared mantissa addition module, on mantissas of the floating-point numbers, configuring a floating-point number processing module, and performing exponent matching and normalization on exponents of the floating-point numbers to obtain a normalized result; obtaining a floating-point number addition result according to sign bits of the floating-point numbers, the exponents subjected to the exponent matching and the normalized result; and Stransmitting the result to an output module, and outputting the result.
原文(中文)
A design method for a fixed-point and floating-point adder includes: Sperforming fixed-point and floating-point identification by a shared mantissa addition module; Sfor fixed-point numbers, performing low-bit calculation in the shared mantissa addition module; configuring a fixed-point number processing module, saving a carry of a highest bit in low-bit calculation results, and transmitting the saved carry to the fixed-point number processing module to obtain a fixed-point number addition result; Sfor floating-point numbers, performing calculation, in the shared mantissa addition module, on mantissas of the floating-point numbers, configuring a floating-point number processing module, and performing exponent matching and normalization on exponents of the floating-point numbers to obtain a normalized result; obtaining a floating-point number addition result according to sign bits of the floating-point numbers, the exponents subjected to the exponent matching and the normalized result; and Stransmitting the result to an output module, and outputting the result.