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Dossier

ULTRA LOW POWER LOW NOISE BUFFER AND ELECTRONIC DEVICE

InventionPending
10Claims · 2 independent
§ Ⅰ

Dossier Overview

Inventor

Siewseong Tan; Awinash Anand; Tiongkee Chua

IPC Classification

H3K 5/1252H3F 3/45

CPC Classification

H3K5/1252H3F3/45475H3F2200/372

Provided is an ultra low power low noise buffer and an electronic device. The ultra low power low noise buffer includes: a source current drive circuit; and a sink current drive circuit, the sink current driving circuit includes a first transistor, a second transistor and a first current source connected to each other, and the source current drive circuit includes a second current source, a third transistor, an operational amplifier and a voltage source, the second current source is electrically connected to the first transistor and the third transistor, the third transistor is electrically connected to the first transistor and the operational amplifier, and the operational amplifier is electrically connected to the voltage source, the first transistor, the second transistor and the first current source. The chip area, the power consumption, noise induction, output resistance and total harmonic distortion are reduced, and the power supply rejection ratio is improved.

Original (Chinese)

Provided is an ultra low power low noise buffer and an electronic device. The ultra low power low noise buffer includes: a source current drive circuit; and a sink current drive circuit, the sink current driving circuit includes a first transistor, a second transistor and a first current source connected to each other, and the source current drive circuit includes a second current source, a third transistor, an operational amplifier and a voltage source, the second current source is electrically connected to the first transistor and the third transistor, the third transistor is electrically connected to the first transistor and the operational amplifier, and the operational amplifier is electrically connected to the voltage source, the first transistor, the second transistor and the first current source. The chip area, the power consumption, noise induction, output resistance and total harmonic distortion are reduced, and the power supply rejection ratio is improved.

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