SEMICONDUCTOR DEVICE, MEMORY DEVICE, AND ELECTRONIC DEVICE
Dossier Overview
Applicant
Semiconductor Energy Laboratory Co., Ltd.
Inventor
Hajime KIMURA; Shunpei YAMAZAKI
IPC Classification
CPC Classification
A semiconductor device having high storage density is provided. The semiconductor device includes a first layer and a second layer above the first layer. The first layer includes first to fourth conductors, first to fifth insulators, and a first semiconductor, and the second layer includes fifth to seventh conductors, sixth and seventh insulators, and a second semiconductor. The first insulator, the second conductor, the second insulator, and the third conductor are formed in this order over the first conductor, and a first opening having a bottom surface of the first conductor is provided in the first insulator, the second insulator, and the third conductor. In the first opening, a first semiconductor, the fourth insulator, and the fourth conductor are formed in this order. The third insulator is positioned on a side surface of the third conductor and a top surface of the second insulator. The fifth conductor is positioned on a top surface of the fourth conductor and a top surface of the fifth insulator. The sixth insulator and the sixth conductor are formed in this order over the fifth conductor, and a second opening with a bottom surface of the fifth conductor is provided in the sixth insulator and the sixth conductor. In the second opening, a second semiconductor, a seventh insulator, and a seventh conductor are formed in this order.
Original (Chinese)
A semiconductor device having high storage density is provided. The semiconductor device includes a first layer and a second layer above the first layer. The first layer includes first to fourth conductors, first to fifth insulators, and a first semiconductor, and the second layer includes fifth to seventh conductors, sixth and seventh insulators, and a second semiconductor. The first insulator, the second conductor, the second insulator, and the third conductor are formed in this order over the first conductor, and a first opening having a bottom surface of the first conductor is provided in the first insulator, the second insulator, and the third conductor. In the first opening, a first semiconductor, the fourth insulator, and the fourth conductor are formed in this order. The third insulator is positioned on a side surface of the third conductor and a top surface of the second insulator. The fifth conductor is positioned on a top surface of the fourth conductor and a top surface of the fifth insulator. The sixth insulator and the sixth conductor are formed in this order over the fifth conductor, and a second opening with a bottom surface of the fifth conductor is provided in the sixth insulator and the sixth conductor. In the second opening, a second semiconductor, a seventh insulator, and a seventh conductor are formed in this order.
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