FABRICATION OF TRENCH TRANSISTOR WITH ESD IN TRENCH
Dossier Overview
Applicant
Alpha and Omega Semiconductor International LP
Inventor
Xueqing Liu; Qinhai Jin; Sik Lui; Xiaobin Wang; Wenwen Li; Lingpeng Guan; Madhur Bobde; Jian Wang; Sekar Ramamoorthy
IPC Classification
CPC Classification
A method of fabrication and composition of matter, comprising a semiconductor substrate including ions of a first conductivity type wherein the ions of the first conductivity are opposite ions of a second conductivity type, An Electrostatic Discharge Protection (ESD) trench formed in the semiconductor substrate with a lower insulation layer formed over a surface of the ESD trench in the semiconductor substrate. A nitride layer is formed over the lower insulation layer in the ESD trench, and an upper insulation is formed on the nitride layer in the ESD trench. An ESD semiconductor layer is formed on the upper insulation layer.
Original (Chinese)
A method of fabrication and composition of matter, comprising a semiconductor substrate including ions of a first conductivity type wherein the ions of the first conductivity are opposite ions of a second conductivity type, An Electrostatic Discharge Protection (ESD) trench formed in the semiconductor substrate with a lower insulation layer formed over a surface of the ESD trench in the semiconductor substrate. A nitride layer is formed over the lower insulation layer in the ESD trench, and an upper insulation is formed on the nitride layer in the ESD trench. An ESD semiconductor layer is formed on the upper insulation layer.
External Resources