Packaging structure and preparation method thereof, circuit board and electronic equipment
Source: EPO OPS
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Dossier Overview
Application number
CN202411111996
Inventor
ZHOU WEI; CUI MENGHUA; WANG ZUKUN; ZHANG SHIYOU
Filing Date
Aug 14, 2024
Publication Date
Sep 13, 2024
Patent Family ID
92670353
IPC Classification
CPC Classification
[0001] This application relates to a packaging structure and its fabrication method, as well as a circuit board and electronic device. The packaging structure includes a stacked structure, which includes a dielectric layer, comprising a first dielectric layer and a second dielectric layer. At least one side of the first dielectric layer is provided with a second dielectric layer, and a power device is embedded in the first dielectric layer. This packaging structure not only eliminates the need for a casing and sealant, improving integration, but also, to a certain extent, prevents heat generated by the power device from being transferred to at least one surface of the packaging structure, mitigating the thermal impact of the power device on other components on the corresponding surface of the packaging structure during operation.
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