元の名称記録: Infineon Technologies AG

Systems, methods, and circuitries are provided for using a narrowband carrier wave to generate a timing signal in a ultra wideband device. In one example, an ultra-wideband (UWB) device includes a processor; a memory storing instructions for a ranging process, the instructions for execution by the processor and narrowband (NB) based timing circuitry. The NB based timing circuitry is configured to receive a NB carrier wave and generate a system clock signal. The UWB device includes a UWB transceiver configured to transmit UWB signals or receive UWB signals related and synchronized to the ranging process based on the system clock signal.

According to various embodiments, a security device is provided comprising a modular reducer configured to perform a modulo reduction by a modulus of each binary number of a sequence of binary numbers forming a data word, wherein each binary number consists of n bits by one or more first iterations comprising, in reaction to a first detector of the security device detecting that the most significant bit (MSB) of the binary number is set, changing the binary number by deleting its MSB and adding the difference between 2and the modulus to the binary number, followed by one or more second iterations comprising, in reaction to a second detector of the security device detecting that the MSB of the sum of the binary number with the difference between 2and the modulus is set, setting the binary number to that sum, wherein the MSB of the sum is deleted.

A method of forming a semiconductor device is proposed. The method includes forming a doped region of a first conductivity type in a SiC semiconductor body. Forming the doped region includes introducing dopants of the first conductivity type into the SiC semiconductor body by at least one ion implantation process. Forming the doped region further includes introducing dopants of the first conductivity type into the SiC semiconductor body by at least one plasma doping process. A penetration depth of the dopants introduced by the at least one ion implantation process is larger than a penetration depth of the dopants introduced by the at least one plasma doping process. The method further includes forming a contact material on a contact surface portion of the doped region. The contact surface portion includes the dopants introduced by at least plasma doping process.

A circuit device may be configured to perform early detection of degradation problems associated with delamination or cratering in the device. The device may comprise a semiconductor layer comprising at least a portion of one or more power transistors, a metallization layer formed over the semiconductor layer, and a plurality of excitation elements formed into the semiconductor layer, wherein the excitation elements extend through the semiconductor layer to the metallization layer such that an excitation pulse can be delivered into a first excitation element and received from a second excitation element after passing laterally through the metallization layer.

A radio frequency (RF) device includes a substrate; an RF chip arranged on a first main surface of the substrate; a first coupling element arranged in the substrate and configured to couple an RF signal into or out of the substrate; a second coupling element arranged in the substrate and configured to couple an RF signal into or out of the substrate; a first RF signal path coupling the RF chip and the first coupling element, wherein the first RF signal path is at least partially arranged in the substrate and includes a first section with an RF signal propagation parallel to the first main surface; and a second RF signal path coupling the RF chip and the second coupling element, the second RF signal path including a first section with an RF signal propagation parallel to the first main surface.

A security device comprise a sampler configured to, in each iteration of a sequence of iterations, sample a string of n bits, a bit string rejector configured to reject the string of n bits in reaction to an AND combiner generating an AND combination of the sampled bits which is equal to 1, in case a given limit or an integer multiple of the given limit is equal to 2−1, and AND-OR combiner generating an AND combination of the most significant bit of the sampled bits with an OR combination of the other bits of the sampled bits which is equal to 1 in case the given limit is equal to 2+1; and a controller configured stop the sequence of iterations in reaction to a number of strings of n bits which have not been rejected being equal or above a predefined number of bit strings.

A silicon carbide device includes body and source regions in contact with an active sidewall of a trench gate structure formed in a first surface of a Sic body, the source region located between the body region and the first surface. A shielding region of a conductivity type of the body region extends from the first surface into the SiC body and directly adjoins the source and body regions. In at least one horizontal plane parallel to the first surface, a dopant concentration in a first body portion distant from the active sidewall is at least 150% of a reference dopant concentration in the body region at the active sidewall. The first body portion forms a bulge extending from the shielding region into the body region. A maximum lateral extension of the bulge is located at a distance to the source region.