PARALLEL MACROBLOCK SCAN LINE DECODING WITH ERROR HANDLING
Dossier Overview
Applicant
Intel Corporation
Inventor
Hiu-Fai Ricky Chan; James Michael Holland; Tsung-Han Yang; Jason Paul Neilson; Nekhil Baid; Ce Wang; Samuel Wong
IPC Classification
CPC Classification
Systems, apparatus, articles of manufacture, and methods to perform parallel macroblock scan line decoding with error handling are disclosed. An example apparatus disclosed herein includes a first decoder circuit to decode a first macroblock scan line of an encoded video frame, the first decoder circuit to fetch the first macroblock scan line from memory based on a load balancing algorithm. The disclosed example apparatus also includes a second decoder circuit to decode a second macroblock scan line of the encoded video frame, the second macroblock scan line different from the first macroblock scan line, the second decoder circuit to fetch the second macroblock scan line from the memory based on the load balancing algorithm. In the disclosed example apparatus, the first decoder circuit is to decode the first macroblock scan line and the second decoder circuit is to decode the second macroblock scan line in parallel.
Original (Chinese)
Systems, apparatus, articles of manufacture, and methods to perform parallel macroblock scan line decoding with error handling are disclosed. An example apparatus disclosed herein includes a first decoder circuit to decode a first macroblock scan line of an encoded video frame, the first decoder circuit to fetch the first macroblock scan line from memory based on a load balancing algorithm. The disclosed example apparatus also includes a second decoder circuit to decode a second macroblock scan line of the encoded video frame, the second macroblock scan line different from the first macroblock scan line, the second decoder circuit to fetch the second macroblock scan line from the memory based on the load balancing algorithm. In the disclosed example apparatus, the first decoder circuit is to decode the first macroblock scan line and the second decoder circuit is to decode the second macroblock scan line in parallel.
External Resources