SACRIFICIAL RIBBON FOR UNIFORM WORKFUNCTION AND CAPACITANCE BENEFITS
Dossier Overview
Applicant
Intel Corporation
Inventor
Tao Chu; Guowei Xu; Robin Chao; Feng Zhang; Ting-Hsiang Hung; Chia-Ching Lin; Yang Zhang; Kan Zhang; Chun Wing Yeung; Minwoo Jang; Yanbin Luo; Paul Packan; Chung-Hsun Lin; Anand Murthy
IPC Classification
CPC Classification
Integrated circuit (IC) devices having gate-all-around field-effect transistors with nanoribbon channels through gate electrodes. An IC device has a stack of nanoribbon channels through a gate electrode, and the gate electrode has uniform gate thicknesses of gate metal and dielectric layers between, over, and under each of the nanoribbons. The nanoribbons extend between pairs of gate spacers to couple source and drain bodies, with pairs of matching gate spacers over and under each of the nanoribbons. A pair of second gate spacers are on and over an uppermost pair of the first gate spacers. A sacrificial cap layer is deployed over an uppermost of the channel layers during processing, and end portions of cap layer are retained as the second gate spacers.
Original (Chinese)
Integrated circuit (IC) devices having gate-all-around field-effect transistors with nanoribbon channels through gate electrodes. An IC device has a stack of nanoribbon channels through a gate electrode, and the gate electrode has uniform gate thicknesses of gate metal and dielectric layers between, over, and under each of the nanoribbons. The nanoribbons extend between pairs of gate spacers to couple source and drain bodies, with pairs of matching gate spacers over and under each of the nanoribbons. A pair of second gate spacers are on and over an uppermost pair of the first gate spacers. A sacrificial cap layer is deployed over an uppermost of the channel layers during processing, and end portions of cap layer are retained as the second gate spacers.
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